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Hello visitor from
USA - 60 visiting from 51 USA 4 France 1 Finland 1 Germany 1 Hong Kong 1 UK 1 China
Sell Cy7c1423jv18-267bzxc Electronic Components, Synchronous Pipelined Sram
Posted at: Offers to Sell and Export | Posted on: Tuesday 4 September 2012 5:41 am | Poster last visit: Friday 26 July 2013 |
Product Description:
Excellent Integrated System LIMITED (EIS LIMITED), Established in 1991, is a professional independent
stocking distributor of electronic components and specialize in buying the EXCESS STOCK from the original equipment manufacturers (OEMs), Contract equipment manufacturers (CEMs), and many other factories. EIS has gained good experiences in Excess Inventory Management through its development over 20 years and has become the reliable partner for the domestic and foreign OEM manufacturers. If any inquiry and question, please email us:
Part number cy7c1423jv18-267bzxc
BRAND Cypress Semiconductor [Cypress]
Packaging fbga
Date code 12+
Price 2~2.8usd
Summary 36 Mbit density, Synchronous internally self-timed writes, FBGA, DDR-II SIO SRAM
Description as follow:
The CY7C1423JV18-267BZXC is a 1.8V Synchronous Pipelined SRAM. It is equipped with Double Data Rate Separate I/O (DDR-II SIO) architecture. The CY7C1423JV18-267BZXC consists of two separate ports: the read port and the write port to access the memory array. The CY7C1423JV18-267BZXC has separate data inputs and data outputs to completely eliminate the need to “turn-around” the data bus required with common I/O devices. Access to each port is accomplished through a common address bus. Addresses for read and write are latched on alternate rising edges of the input (K) clock.
Parametrics
CY7C1423JV18-267BZXC absolute maximum ratings: (1)Storage Temperature:–65℃ to +150℃; (2)Ambient Temperature with Power Applied:–55℃ to +125℃; (3)Supply Voltage on VDD Relative to GND:–0.5V to +2.9V; (4)Supply Voltage on VDDQ Relative to GND:–0.5V to +VDD; (5)DC Applied to Outputs in High-Z:–0.5V to VDDQ + 0.3V; (6)DC Input Voltage:–0.5V to VDD + 0.3V; (7)Current into Outputs (LOW):20 mA; (8)Static Discharge Voltage (MIL-STD-883, M. 3015): > 2001V; (9)Latch-up Current:> 200 mA.
Features
CY7C1423JV18-267BZXC features: (1)36 Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36); (2)300 MHz clock for high bandwidth; (3)2-word burst for reducing address bus frequency ; (4)Double Data Rate (DDR) interfaces (data transferred at 600 MHz) at 300 MHz ; (5)Two input clocks (K and K) for precise DDR timing: SRAM uses rising edges only; (6)Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches; (7)Echo clocks (CQ and CQ) simplify data capture in high speed systems; (8)Synchronous internally self-timed writes; (9)1.8V core power supply with HSTL inputs and outputs; (10)Variable drive HSTL output buffers; (11)Expanded HSTL output voltage (1.4V–VDD); (12)Available in 165-Ball FBGA package (15 x 17 x 1.4 mm); (13)Offered in both Pb-free and non Pb-free packages; (14)JTAG 1149.1 compatible test access port; (15)Delay Lock Loop (DLL) for accurate data placement.
Diagrams
Company Contact:
Contact Name: John
Company Name: Excellent Integrated System Limited (eis Limited)
Email:
Tel: 00852-30777742
Fax: 00852-30777843
Street Address: Rm 906, Workingberg
Comm Bldg, 41-47 Marble Rd, Hong Kong
Member name: EISLIMITED
Country: Hong Kong
Member Since: 29 August 2012
Total Leads: 537 EISLIMITED Import Export Business Leads
Business focus: Electronic Components, Active Component, Integrated Circuit, Semiconductor, Chips
Chat:
Verify: Safe Import Export Tips
stocking distributor of electronic components and specialize in buying the EXCESS STOCK from the original equipment manufacturers (OEMs), Contract equipment manufacturers (CEMs), and many other factories. EIS has gained good experiences in Excess Inventory Management through its development over 20 years and has become the reliable partner for the domestic and foreign OEM manufacturers. If any inquiry and question, please email us:
Part number cy7c1423jv18-267bzxc
BRAND Cypress Semiconductor [Cypress]
Packaging fbga
Date code 12+
Price 2~2.8usd
Summary 36 Mbit density, Synchronous internally self-timed writes, FBGA, DDR-II SIO SRAM
Description as follow:
The CY7C1423JV18-267BZXC is a 1.8V Synchronous Pipelined SRAM. It is equipped with Double Data Rate Separate I/O (DDR-II SIO) architecture. The CY7C1423JV18-267BZXC consists of two separate ports: the read port and the write port to access the memory array. The CY7C1423JV18-267BZXC has separate data inputs and data outputs to completely eliminate the need to “turn-around” the data bus required with common I/O devices. Access to each port is accomplished through a common address bus. Addresses for read and write are latched on alternate rising edges of the input (K) clock.
Parametrics
CY7C1423JV18-267BZXC absolute maximum ratings: (1)Storage Temperature:–65℃ to +150℃; (2)Ambient Temperature with Power Applied:–55℃ to +125℃; (3)Supply Voltage on VDD Relative to GND:–0.5V to +2.9V; (4)Supply Voltage on VDDQ Relative to GND:–0.5V to +VDD; (5)DC Applied to Outputs in High-Z:–0.5V to VDDQ + 0.3V; (6)DC Input Voltage:–0.5V to VDD + 0.3V; (7)Current into Outputs (LOW):20 mA; (8)Static Discharge Voltage (MIL-STD-883, M. 3015): > 2001V; (9)Latch-up Current:> 200 mA.
Features
CY7C1423JV18-267BZXC features: (1)36 Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36); (2)300 MHz clock for high bandwidth; (3)2-word burst for reducing address bus frequency ; (4)Double Data Rate (DDR) interfaces (data transferred at 600 MHz) at 300 MHz ; (5)Two input clocks (K and K) for precise DDR timing: SRAM uses rising edges only; (6)Two input clocks for output data (C and C) to minimize clock skew and flight time mismatches; (7)Echo clocks (CQ and CQ) simplify data capture in high speed systems; (8)Synchronous internally self-timed writes; (9)1.8V core power supply with HSTL inputs and outputs; (10)Variable drive HSTL output buffers; (11)Expanded HSTL output voltage (1.4V–VDD); (12)Available in 165-Ball FBGA package (15 x 17 x 1.4 mm); (13)Offered in both Pb-free and non Pb-free packages; (14)JTAG 1149.1 compatible test access port; (15)Delay Lock Loop (DLL) for accurate data placement.
Diagrams
Company Contact:
Contact Name: John
Company Name: Excellent Integrated System Limited (eis Limited)
Email:
Tel: 00852-30777742
Fax: 00852-30777843
Street Address: Rm 906, Workingberg
Comm Bldg, 41-47 Marble Rd, Hong Kong
Member name: EISLIMITED
Country:
Hong KongMember Since: 29 August 2012
Total Leads: 537 EISLIMITED Import Export Business Leads
Business focus: Electronic Components, Active Component, Integrated Circuit, Semiconductor, Chips
Chat:
Verify: Safe Import Export Tips
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